1. Field of the Invention
The present invention relates to a semiconductor structure and a fabrication method thereof. More particularly, the present invention relates to a metal oxide semiconductor transistor and a fabrication method thereof.
2. Description of Related Art
As the process linewidth of semiconductor device are scaledown, the leakage current in the source/drain of MOSFET away from the gate has increased accordingly. The leakage current problem can be solved through thinner gate dielectric layer, however, when the linewidth is reduced to under 0.1 μm, the leakage current cannot be reduced even with a very thin gate dielectric layer.
Thus, MOSFET with trench gate is developed, such as FinFET, in order to resolve the above defect. This design include disposing the gate in the trench of the substrate to form a recess channel, so as to reduce the electric filed intensity in the channel, and reduce short channel effect and leakage current by increasing channel length.
However, in the foregoing transistor, the source/drain is generally disposed beside the gate, and the dopant concentration of the source/drain region is very high. Thus, after supplying voltage to the device to perform an operation, parasitic capacitance is generated at the gate dielectric layer between the highly doped source/drain region and the gate due to increase the electric field. Along with the increase of integration of semiconductor devices, the problem of parasitic capacitance has become more and more serious, which adversely affect the performance of the devices.